The maximum PWM frequency attainable using the factory OSCCAL value, and using OCR1B=2 and OCR1A=1 is 8.525MHz with the only possible duty cycle is 33%. With OCR1B=3 we get 6.393MHz, OCR1B=4 we get 5.115MHz.
I want to use my beacons in the ISM band of 6.78MHz so the second value (OCR1B=3) is the closest. I managed to output a duty cycle of 25% (OCR1A=1) or 50% (OCR1A=2), this is perfect for a class E drive as 50% is available. The final tuning was done with trial and error on the OSCCAL value until I got the correct frequency.
In my tests, the factory value for OSCCAL (of all the Atmel Tiny15L I tested) would get you within 1% of the nominal frequency 1.6MHz, but with frequency measurement and tuning I got to within 0.5%.
Did a couple of other idiot measures and observations.
- The program memory of the ATtiny loops, the PC is only 9bits and when the last instruction of Program memory is reached execution continues for 0000.
- A NOP consumes less current that an rjmp +0, not significantly but noticeable. I fill the memory with each instruction and measure the current with or without BOD. The second instruction also take double the time of execution.
RJMP+0,BOD - 3537uA (AVG)
RJMP+0,NO BOD - 3494uA
NOP,BOD - 3503uA
NOP, NO BOD - 3458uA
- OSCCAL after reset is cleared and the measured clock frequency is 1.1MHz, when taken to 0xFF the frequency is 2.083MHz.
- Clock jitter of the oscillator. I filled the program memory with the following:
lp000:
.rep64
sbi portb,portb1
cbi portb,portb1
.endr
rjmp lp0000
I would then trigger the scope at the low level at the end of the loop. This gap would last longer than normal, then it is easy to trigger on it. You can just see it under the trigger arrow in the picture above.
I would the trigger to the flank increase persistence to max and let measure. the jitter.
The waveform goes up quite fast (in less than 10ns) with the oscilloscope probe as load. With a gate of MOSFET... it's not so good...