The reason I'm using the MACH131SP is because last year I bought a box of about 100 in Ebay, so now I have "stock" for the years to come... I had to buy an adaptor for the TQFP 100 in order to WireWrap a simple circuit, the one in the picture was bought in Japan. I soldered the CPLD by hand, it is not very dificult but you need a good soldering iron, good solder, a clean board and a steady hand.
The circuit included a 78L05 to regulate the supply voltage, but I had to bypass it since the CPLD consumes 75mA and the 78L05 limit is 100mA. With most of the inputs floating the CPLD forces the 78L05 into foldback and quasi-shutdown.
The other connector is the 10 pin In System Programmable connector (JTAG), from it I can program a plurality of devices in a JTAG chain.
For connecting power and the ISP connections I used Wire Wrap technique, while for the USBKeyboard circuit I used a special enameled wire. With the Wire Wrap soldering the pins is not mandatory as long as you use correctly the wrapping tool. With the enameled wire a special pen is used to lay the wire, wrapping around the pins you need to connect and then solder must be applied for some time (and temperature) breaking the enameled protection and soldering to the pins.
The next step is use what I've learned from this Mini85 project add it to the PCB design and USBKeyboard and build a eurocard (100x160mm) CP/M computer.
Here is his last picture in this format...Mini85 "will be back" soon... in PCB format...
Here's a picture of my Joules Thief circuit with a white LED...Some parameters can be determined experimentally, like saturation of the inductor (max ampere turn), gain of the transistor, the frequency of oscillation can be controlled with a capacitor on the base circuit. I've also experimented with a solar cell powering the circuit, but the it needs to be under a strong light.
One of my project ideas was to build an "daylight extender" with a two or three white LEDs, a Ni-Cd battery and a light sensor, maybe with a microcontroller.
Today is the winter solstice, the shortest day (daylight) of the year! It is time to celebrate... From now on the days can only get bigger, although it can still get colder... brrr.... It is also the start of the Winter season! We already had the first snow fall in late November, but with only two centimeters of snow... maybe later it gets more interesting.
And now for something completely different...
The ongoing mini85 (8085) project is to big for a first try, there are many packages that are not standard in gEDA, many schematic symbols that also do not come standard, there are many ICs in the schematic, these are too many variables to control for a first time.
I needed something smaller, where I could fully test the tools. I decided to use my USBHID Flight simulator control for this project. I would also try out other things like adding a MACH131SP because it is a SMD component, programmable via a ISP connector (also test the software) and test the package outline of a DB9 connector, the power connector and USB B connector.
I want to send the board for fabrication, most of the PCB fabrication houses need a gerber file (none accepts pcb format), but not many details appear in the official tutorial.
The schematic editor has a reasonable sized library, but if a symbol is needed the procedure is quite fast, I used tragesym and the tutorial is here. I redesigned the symbol for the Atmel AVR AT90S2313 (also ATtiny2313), because I prefer to have direct access to the VCC and GND pins and I don't like the crystal oscillator and the reset input in the bottom. Here is the first page of the schematic.
jluciani, it seems very complete... I still have to understand how to use it properly and in conjunction standard libraries. It needs a small modification of the command line of gsch2pcb.
gsch2pcb --use-files --elements-dir ~/footprints SCHEMATIC_NAME
For now I think the footprints provided are suficient, but I'll probably need to draw new footprints for some older PGA microprocessors (when the time comes)...
Another way will be to try the same system with kicad, it also appears to be a good (free) design tool for linux. It has an extra that for now I don't really need which is the 3D view, but who knows latter...
I opened the keyboard and separated the membrane, I marked lines and columns with letters and numbers respectively.
Then I wired a switch to the keyboard on the "Q" contacts, the second contact would be used to power the LED when the switch was activated.
I started with the HIDKeys project, but since I didn't have a ATmega8 I had to change the project for the ATtiny2313. I started with a breadboard version of the project once the software started running OK (being recognized by the PC), I build a small prototype board.
This weekend I finished the formating function and the display help function. On the hardware I changed the regulated power supply by a home build switching power supply, I've also changed the Motor on timer to 30 seconds to reduce wear on the floppies.
I've also created a task lisk on the blog's front page so it's easy to keep track of the TO DO list on the Mini85. I think it is a good idea, to keep a todo list for each project while it is running.I'll keep a list alive and maintained until a new project comes along, then I'll do a new one.
The format routine had a few details, the interrupt routine had to be changed to support the read/write operations and format operations.
Two pictures of the switching power supply, pretty standard. An LM2575-5.0 simple switcher, a RENCO 330uH inductor with IRMS 3 Amp capability (an old sample I had) and a schottky diode 1N5819 (here the diode is only capable of IRMS 1A)...
I setteld with Altair Z80 SIMH because it suited better my project. On the processor side allows you to change form the standard Z80 of most simulators to a 8080 processor, you can easily reduce the memory to 32Kb, it also has the boot disks and source (although in Z80 format) for CP/M 2.2, CP/M 3, and MP/M II. Finally and also very important, not only it supports the disk format I wanted to use (3.5 inch 1.44Mb, i.e. as used by P112) as also supports accessing the floppy disk directly.
As recommended here, I used a image file to transfer the files and then used NTRAWRITE to transfer the files to the floppy. I am using a USB 3.5 inch drive and the other usual tools to read and write CP/M disks didn't work as they used direct access to the UPD765 in regular PC.
The procedure is easy, start altairz80 and type in:
sim> set hdsk1 format=p112
sim> attach hdsk1 \\.\B:
sim> show hdsk1
HDSK1, 1474KB, attached to \\.\B:, P112, WRTENB, QUIET,
At the moment I can only use CP/M 3 for reading and writing the disk images, because for CP/M 2.2 one needs to adapt the bios specifically for each hard disk.
When all the files have been transferred to the disk image, close the simulator and use NTrawrite to write the floppy image into the floppy.
- do I need it?
- will i use it reasonably? (in cases you're in debt already, the question is "can I afford it?")
- can I get a better price?
Well a better price in the drive unit is certainly needed here are the other sites I've found:
Have a great week.
- try (again) changing the FDC765 clock circuit down to 4MHz;
- change the FDC interrupt to RST7.5;
- change CRT_RXD input to RST6.5;
- change RDR input to RST5.5 (instead of SID);
- change PUN output to one of the 74HC259;
- do a system request input in INTR or TRAP inputs;
- do the LPT interface (with STROBE and PERROR);
- upgrade the system to full 64k bytes. (play Zork!)
- decide what to do with SID input and SOD outputs ?
- lights for RDY, INTA, floppy, etc..
- add the switching power supply and the MOTOR ON one-shot to the schematics.
- disable CRT/RDR interrupts while on FDC read/write cycle (blocks the system);
- put the processor in HALT while waiting for a character (save power);
- implement the RDR and PUN functions;
- implement the LST function;
- during a warm boot, read the operating system all at once instead of sector by sector (faster);
- change interrupts to follow the hardware changes above;
- either put most of the BIOS in ROM (32K) or in upper RAM (64K).
The problem with the 64K expansion is that it would use a second RAM IC, that takes up valuable breadboard space (as I have a three breadboard limit), plus probability of failing due to wiring. I think I can still make some more optimizations on the IC's used.
Two weeks ago, when starting the rear Axel moved. If the Axel is not securely fastened when you're really pushing the pedal, the Axel can shift forward (on the crank and chain side) and the wheel becomes bocked by the frame, like in the picture below.
Fixing it is quite straight forward, unscrew the axel, hold the wheel in the center while stretching the chain, and progressively securely fasten the Axel. A good guide on Bikes can be found here, although the author of said site prefers direct drive, my Kronan is a "Single speed" with a "Coaster Break".
This part of the circuit also include the FDC-DMA blocking circuit, the IO decoding and the Memory decoding and the reset circuit.
The third sheet holds the floppy disk interface, data separator FDC9216, write clock divider, Drive interface and floppy connector.
The forth sheet (still to come) will hold the switching power supply and the motor on circuit.
It is still difficult to print schematics with gschem, I tried the light output but it is not the best, I'll have to try again with light background and no colors. I will also try to print out a list of connections to do the wire wrapping circuit.
It turned out it could not be done, at least as far as I tried. The data separator FDC 9216 cannot read 500kbps without an 8MHz input, from the datasheet it is impossible to get that rate without an 8MHz clock. The WRCLK divisor could work but I would need to change the divisor ratio, but the 765 didn't seem to like the 4MHz clock at all as it was unable to read any sector, even increasing the byte loop and changing the specify parameters.
Finally I have a reached the final hardware configuration for this project. My current IC count is only 16!
- 8085AH-2 @ 4MHz (8MHz crystal)
- 74HC573 (address latch)
- 27C256 (EPROM emulator 32K bytes)
- 62256ALP-10 (system RAM 32K bytes)
- MAX232 (serial interface)
- 7400 (used as 4 inverters...!!)
- 74HC139 (address and IO decoder)
- 74LS08 (address decoder, only 2 ports used)
- 74HC259 (addressable latch, serial port, memory flip)
- LM555 (motor on delay)
- 74HC161 (WRCLK divider)
- UPD765 (Floppy Disc Controller IC)
- 74HC14 (FDC Interface to the drive)
- FDC9216 (Data separator for 3.5 HD drive)
- 74LS32 (FDC Interface to the drive)
- 74LS240 (FDC Interface to the drive)
There might be some more optimizing to do, I'm going to try and use gEDA gschem to draw the schematic and I'll post them as soon as their finished.
Next I need to clear this bug and try some CP/M software that runs in 24k since my system needs 8k for the operating system. Since I am using a "standard" CP/M format of a not-so-old CP/M system (P112), and this format is supported by CP/M 3 running in simulator SIMH (the version emulating the Altair), I can create disks and transfer files from the simulator to the real Mini85.
Update: I managed to write a Floppy with a copy of CP/M 2.2 startup disk used in SIMH, corrected the warm boot code, and I filmed the boot sequence with some daylight.
Here's the new video...
In my opinion the best way is to upgrade a recumbent tricycle, the front wheels are free-wheels and tilt slightly when you turn, they could be provided with brakes.
Auxiliary power (i.e. Electric, yes main power is pedal power) is provided to the sole traction wheel in the back. Either inside the hub, or in the chain, or even using a auxiliary wheel connected (on demand) to the main wheel.
I found some electric bikes site that also sell conversion kits and just the parts, although they do not provide much detail about the type of motor (DC series, parallel or separate excitation, AC synchronous, asynchronous/induction). I found it a bit expensive but I must agree that, at least according to the pictures, the motoring block appears well built the planetary gear is always expensive and the motor is cramped inside the hub.
Then I found some "recumbent designs" here, here, here, some electric recumbent here, a list of sites related here, an finally a "Hack a day" page.
Well the ideas have been written, now I need some time, finish all the other million projects, survive the credit crunch, wait for my bank not to go bust (or be nationalized) and pray for the best....
In Andy Johnson-Laird's book "The Programmer's CP/M Handbook" the major steps of bringing up your own CP/M system are well explained and in this order:
- Create your new BIOS with the appropriate device drivers in it. Assemble this so that it will execute at the top of memory (and determine the start address of the OS).
- Create the new versions of the CCP and BDOS with all addresses inthe instructions changed so that they will be correctly located in memory just below the new BIOS. (Nowadays you can assemble this code instead of using MOVCPM)
- Create or modify a CP/M bootstrap loader that will be loaded by the firmware that executes when you first switch on your computer.
- Using Digital Research tools to bring the bootstrap loader, CCP, BDOS, and BIOS in the first tracks of the floppy. (I used my ROM monitor for this).
I skipped steps 1 and 2 because in a previous "incarnation" of the system I did it and I know it will be the not so dificult part. So I rewrote my Monitor disk read and write to be a little more "efficient" and used them in the bootstrap code.
After a RESET, the 8085 checks if there is a disk in drive. If so, seeks drive 0 (or A:) to track 0, and tries to read sector 1 (sector zero does not exist, only for historical reasons) into memory address 100H.
Then jumps to address 100H if it contains the byte value 0F3H, it is the code of a disable interrupts instruction (DI) in the 8080, 8085, z80, nsc800 family of microprocessors.
The bootstrap loader then reads the rest of operating system into memory (CCP,BDOS,BIOS) from the first track (sectors 2 and on). Then a jump is made to the cold boot function in the BIOS, then CP/M starts.
I used SIMH and CP/M 2.2 for assembling the code, I fell in a little trap with ASM. It recognizes the instructions SIM and RIM as labels not as instructions... I only found this by reading the assembler print out. I had to use a DB 30H for SIM and a DB 20H for RIM, then it worked ok.
The Boot Sector Code is posted here.
The first technique is using a edge triggered interrupt and the HALT instruction (NMI in the Z80 or RST7.5 or TRAP in the 8085), the interrupt routine is void but although in the z80 it is automatically cleared on interrupt entry, on the 8085 two extra instructions must be used in the ISR.
The second technique is the WS (wait state) insertion while waiting for the floppy to get the data. This is a similar technique to the one I'm using in the mini85, the schema proposed has more control options as sensing the interrupt call and determine an error, conditional enabling of WS insertion.
On the Z80 both these methods allow and profit in terms of timing by executing the INI instruction, one instruction fetch with 3 operations executed (IN (C),INC HL,DCR B).
Hopefully I will use a combination of both methods, WS insertion for data reads and writes and halting the processor for seek/recall operations.
After reading about lots of complaints about small disk sizes I decided to go the extra mile and implement the said pseudo-dma circuit and routine for 3.5 HD drives. Yes, I had to ask some more questions in the yahoo group, but someone with infinite patience explained me the easy way to do it. Here is the schematic I used for pseudo-dma and the 8085 to read 3.5 HD floppies.
The operation of this circuit is the following, the read operation is started and a special IN instruction (addresses 2xH) lock the processor in a wait state and asserts DACK. When the byte is ready (this can last a full rotation of the disk) DRQ is asserted unlocking the processor and completing the read.
There is a problem with this schematic and my program, if an interrupt occurs during a normal read (signaling an error during the read) the processor is unlocked but the first byte read is already the result byte. Beeing RST6.5 level triggered, when the next instruction to the IN is fetched there is no longer a pending interrupt (765 INT line gets deasserted when the first byte of result phase is read) and the system hangs in execution phase.
One alternative would be to use RST7.5, it is latched by the processor, but on entry in the interrupt routine one should be aware that ACC could contain the first result phase byte. There is a special case where it could not be! As in an error occurs exactly after reading a byte.
The big issue is that a read or write during execution phase must be completed at 16us nominal (13-11us worst case) and testing if byte is ready or interrupt is pending takes time.
My next "development" will be polling interrupts for seek and recalibrate operations, as for the execution phase, maybe go back to the NO DMA mode (ND=1) and use HALT as a wait for interrupt instruction, do the test for results phase and read in the byte.
As for a latter hardware development would be to reduce the 765 clock from 8MHz to 4MHz and use CLKOUT instead of X2 buffered (save a gate).
- it would be difficult to find a project with modern day 3.5 inch drives (later I found this one);
- they would not use MFM at 1MHz bit rate to achieve 1.44Mb densities because it is too fast for the processor (13us) and some sort of DMA would be necessary.
I was reading comp.os.cpm and a new yahoo group started for people that would want to build their own CP/M computer. My project was going that way so I joined in, draw up some schematics and started writing code and asking questions.
After initial hardware development and some code, I managed to read and write a 720k floppy on the mini85. To get the best processor speed and least overhead, the 8085 was running at 10.24MHz (2.5% over clocking) and a 8256AH-2 connected to the CLKOUT (@5.12MHz) for the serial interface.
Regarding the interface between the 8085 and the 765, I used no interrupts (although connected) and polled In/Out as the 8085 is perfectly capable of polling the 765's status and reading the data in less than 26us.
I was using a PC to read/write/format a normal HD disk with the hole closed with tape, and I was using DEBUG in MSDOS to write sector on the disk.
As for circuits I tested the one used in prof80 and the one used in the ZX Spectrum +3, in the end I settled for my version of the prof80, i.e. I changed the data separator to a FDC9216 and used a 8MHz clock to the FDC9216 and UPD765, an a 1MHz divider (74LS161) for the 765's WRCLK. I then compromised the 8085 clock to 8MHz so that with a simple change of clock input, either X2 on the 8085 or CLKOUT, I could use 720k or 1.44Mb floppies.
Here's a photo of the assembled one with a micro breadboard on top and the second PCB (to be assembled).
I've tried doing a small schematic with gEDA but in the end I went for "Paintbrush", sorry if my skills are not "excellent". When I use linux I'll try to use Dia or a similar for later postings.
I used RST5.5 for direct serial input, the inverter (74LS04) is needed for generating a interrupt (5V) at the start bit (GND), then interrupts are temporarily disabled during reception. A timing loop waits for the middle of the start bit and checks if it is still low (i.e. the RST5.5 pin is at 5V as it is inverted), if not it was a false start bit and exits the interrupt service routine (ISR). From then on reception depends on a software timing loop, inversion of the sensed interrupt line, and shifting the bit in.
The received character is placed in a buffer and a buffer full flag byte is set. The code is posted below as a picture. I'm still not very "experienced" with blogging and placing code snippets online, so I made a "png" with yellow background, it looked better than any other alternative...
I made this project for Valentine's day.. Ana also made me a Valentine's "card".. It's a Attiny26L, a 3V cell (CR2032) and a 5x7 LED matrix display. Since the supply voltage is low, and the circuit was to be the smallest possible the MCU ports are connected directly to the LED matrix i.e. no resistor. It is clear from the video that the more LEDs are on, the lower the intensity. I thought about correcting it with PWM (time on depending on the number of LEDs on) but for simplicity I left it like this.
A better alternative would be to use the display as a 7x5 and characters 5x5, some people have dificulty reading running messages if only one character appears at a time (as in the video).
Developed in C and assembler using linux avr-gcc tools and the Atmel USB-ISP.
My first attempt for a software serial port used SID and SOD line for Receive and Transmit signals and bit-bang the serial signals at 2400 baud 8-N-1.
Then I realized that one of the CP/M BDOS calls needed a different implementation. The functions DirectIO and Read Console Status needed the system to receive a char and keep it in a buffer, until the processor asks for it. Reception must be an asynchronous process!
I though about it and without changing much of the previous routine, I connected an interrupt line of the 8085 to an inverted receive line. First I tried the edge triggerd RST7.5 detecting the down flank of the start bit (but then using SID line to get the status and then RST6.5 to detect the start-bit and to read the input line. When an interrupt occurred the serial reception routine would receive the character, store it in a buffer and in a auxiliary memory position store a "buffer full" status. The CP/M function could then be correctly executed.
Instead of using 2 lines (SID and RST7.5), I used only one RST6.5, after the interrupt is received it is possible to "pool" the RST line with the RIM instruction! I save a input line and a few more instructions. It is now apparent to me that the AUX_IN and CONSOLE_IN can both be implemented by software and without using the SID line!
Removing the 8256 added some other problems, I needed a digital output pin to flip the ROM from 0000H to 8000H (and the RAM the other way), for this I added an addressable latch 74LS259.
Have a great weekend.
The fact is, I really like coffee... strong coffee...
Last year I bought a new cafeteria a Bialetti Brikka, it has a special valve that creates some pressure when the hot water is going through the coffee. The result is a almost expresso like coffee, without the mess and size of an expresso machine or beeing limited to the cartdrige or pad type pseudo-expresso.
For the best coffee I use fresh milled coffee beans (kept in the fridge), the Brikka and filtered water (this last one really makes a difference here in Holland).
Enjoy your coffee....
My project objectives were the following:
- build a CP/M v2.2 compatible computer;
- use the smallest number of integrated circuits and the simplest possible configuration;
- no programmable logic devices, only 74' and 40' series;
- use a 3.5 inch floppy disk as storage;
- the console for the CP/M system would be a terminal VT100 (on a Laptop linux/windows);
- be able to build an fully functioning computer in a breadboard;
- if possible do most of the software development in linux;
- build a wire-wrap version of the final hardware;
- design a PCB, build a box to host it and build a computer.
I started searching computers I knew that supported CP/M, and based the design from it. I looked at the Amstrad CPC 664 and PCW series, and also at the Sinclair Zx Spectrum +3. All these came from effectively the same place so their floppy disk interface was very similar. The used a NEC UPD 765 and a data separator (FDC 9216 or SED 9240) for the MFM encoding.
For the processor I settled on a Intel 8085 (8085AH-2) because I had a few in my parts box, it had an on-chip oscillator and seemed simple enough to build the console serial interface with the SID and SOD lines. The extra address decoder 74573 seemed a cheap option compared to the clock generation circuit for the Z80. I also have a NSC800 but not so much hardware information on it. Using the 8085 at 8MHz also allowed me to drive the UPD765 at the same clock or 4MHz with little or no changes. I also had it running it at 10.24MHz, but then the floppy disk needed a separate oscillator.
For the memory I wanted to use my EPROM emulator bought on ebay and a small enough RAM to run CP/M. I chose a 62256 with 100ns access time and my emulator simulating a 27C256, so 32K RAM and 32K ROM.
As a help circuit, to get me started with a serial interface and some digital inputs and outputs I added an Intel 8256AH. This IC is not very easy to find but it packs two 8bit ports, a serial interface and some timers. The perfect peripheral IC, a bit like the 6522 VIA for the Motorola 6800 or Rockwell 6502 processors.
I'll post more on this one.
The title reflects some of my interests, but hopefully this blog will not be limited to that.
I'll also try to post ideas of things I would like to do but I don't have either the skills or the materials, and links to projects from someone else I would like to do.
I hope you enjoy reading.