gEDA, Spice and small circuit simulation

In my "quest" for a suitable Electronic Design Automation set of tools in Linux, I wanted to test the ngspice in gEDA. I started by reading this tutorial.
I designed a simple single transistor amplifier and draw the basic circuit in gschem. The circuit is a commonly called fixed bias circuit with emitter resistor, for transistor I used a general purpose BC548B.
For drawing the schematic one should use the symbols in the spice library and draw the circuit as usual with the following cares:
- you must remember to place a ground in one of the nodes.
- if you want you can (and should) give numbers to nodes you want to keep track, this is done by editing the netname of node, later it is easy to find and plot the voltages of each node.
- it is better to create a separate file with the models of the semiconductors you use, to use it in gschem edit the model attribute and add a file attribute with the library path and name. I found out that using a big library of models and using only one model is not efficient and prone to errors, and most of the libraries need some adjustment regarding the model parameters. It is better to create a specific library file in the current directory (like models.lib) with only the models needed for the simulation.

For converting the schematic into a spice netlist, one must resort to some trickery. I created the following bash script to create it for me, it does a design rule check and then converts the schematic to a spice netlist, then immediately runs ngspice.

#!/bin/bash
gnetlist -g drc2 $1.sch -o $1.drc
gnetlist -g spice-sdb $1.sch -o $1.net
ngspice $1.net

My bash scripting talent isn't great, but it should give an idea of what you need to do. This script expects one argument, the schematic file name without the extension (.sch).
Once in ngspice you can run the circuit interactively with :

tran 10u 10m
plot v(1),v(103)

I didn't found out how to save a plot, so I used a screen snapshot and cut the edges of the picture in GIMP, but here is the final result.

There is some delay and some distortion in one part of the wave and the gain is quite small. The base appears to saturate during the high side and then appears to take its time coming out of saturation. The delay is introduced by the decoupling capacitors (input and output) and the voltage gain is limited by the Rc/Re to 5, but then further divided by Rc parallel with RL, for a total voltage gain of about 2.5.
The charging of the decoupling capacitors is responsible for the apparent lack of gain in the first half wave.